Archive for: March 28, 2008

March 28, 2008

Voltage drop analysis - a note on accuracy and quality of results

Filed under: Catch All, Voltage Drop Analysis - 28 Mar 2008

To ensure silicon success, voltage drop analysis tools - like all EDA tools - must at their most detailed give results that precisely predict final silicon behavior. Yet for much of the design process the chip is in an incomplete …

Comments on multi-core HSPICE 2008.03 for post-layout

Filed under: Circuit Simulation, SPICE - 28 Mar 2008

Synopsys recently announced a multi-core version of HSPICE (2008.03) that can handle, as well as pre-layout circuits, post-layout designs containing in excess of a million parasitic RCs. Prediction is a risky thing, but we called this a little while ago. …