Category: Catch All

October 27, 2008

Why aren’t EDA tools more precise?

Filed under: Catch All - 27 Oct 2008

Why can’t EDA verification tools, particularly circuit simulation and parasitic extraction/reduction tools, deliver precise results at the finest level of resolution supported by the computer architecture? For today’s machines that would mean full double precision supporting 15 significant digits. And …

July 1, 2008

Rajeev says there’ll only be 2 EDA companies in 5 years.

Filed under: Catch All - 01 Jul 2008

Recently, Magma’s Rajeev Madhavan gave an interview in which he said “I believe that within five years only two EDA companies will survive. We will therefore be one of these two big companies, or we will have been bought by …

April 2, 2008

Voltage drop analysis and verification - static (constant-current) sources

Filed under: Catch All, Voltage Drop Analysis - 02 Apr 2008

As an abstract description you can consider each power distribution network to be mesh-like, of varying sparsity, with voltage sources from external to the chip connecting at some (peripheral or distributed) locations on higher level metal layers, and with transistor …

March 28, 2008

Voltage drop analysis - a note on accuracy and quality of results

Filed under: Catch All, Voltage Drop Analysis - 28 Mar 2008

To ensure silicon success, voltage drop analysis tools - like all EDA tools - must at their most detailed give results that precisely predict final silicon behavior. Yet for much of the design process the chip is in an incomplete …